Pentium III extended floating point support

UnixWare 7 Release 7.1.1 contains enhancements that provide extended floating point and other operations for processors that support them.

Since the introduction of the first Pentium chips, Intel has enhanced the instruction set for their Pentium II 350-450, Pentium II/Xeon, and Pentium III processors. Release 7.1.1 provides support for:

• extended floating point save and restore instructions (fxsave and fxrstor)

• the Streaming SIMD (Single Instruction Multiple Data) instruction set

• 47 MMX instructions added for the Pentium II processor and P-II

• 83 instruction mnemonics added for the Pentium III, which includes 12 additional MMX instructions and 8 cacheability control instructions

These enhancements were originally released to customers as ptf7406,

The benefits of this support are:

• to enable the kernel to take advantage of the faster saving and restoring of floating point state provided by the fxsave and fxrstor instructions

• to allow applications to use the Streaming SIMD instructions and the Pentium III extended floating point registers

• to enable developer tools like as, dis, fur, kdb, scodb, crash, and debug to handle the new instructions and MMX registers

Systems with CPUs that do not support the new instructions will perform as in previous releases. Applications can be written using the new function calls provided for extended floating point support, and can test to see if the processor supports extended floating point instructions.

Documentation for the Intel Pentium instruction set is available from the vendor, and is not shipped with UnixWare 7.

Summary of changes

The following list summarizes the changes made for Release 7.1.1 to support the Pentium III instruction set:

• The crash(1M), fur(1), kdb(1M), and scodb(1M), commands have been enhanced to recognize and disassemble the new instructions.

• The as(1) and dis(1) commands have been enhanced to handle the new instructions.

• The debug command has been enhanced to support the new instructions, allowing both disassembly and register manipulation; see ``Debug changes to support floating point and Pentium III streaming SIMD instructions''

• The user context (ucontext) structure has been enhanced; see ``New user context structure and floating point context flag''. This affects the C library and signal handling:

  • Three new functions have been added to the C library for floating point support; see ``New library functions and related changes''.

  • Signal handling done by the setcontext system call has changed; see ``Signal Handling Changes''.

• The Light Weight Process (LWP) status structure and its handling by the procfs filesystem has changed; see ``New LWP status structure and procfs changes''.

Exceptions to extended floating point support

The following exceptions apply to extended floating point instruction support in Release 7.1.1:

• The C compiler and optimizer have not been enhanced to generate and optimize Pentium III Streaming SIMD or other new instruction. While source files containing the new instructions can be processed by as(1) and the resulting object files used as input to cc(1), only the linking phase of cc applies to such files.

• Unmasked extended Pentium III floating point exceptions are not supported. Applications generating unmasked extended floating point exceptions will terminate when the exception is generated.

• Release 7.1.1 does not include changes to the threads library (libthread) to support extended floating point state. For applications that use threads (see Intro(3thread)) the contents of the extended floating point registers will be undefined when used by multiple threads. If threaded applications use the Pentium III extended floating point registers, the results will be unpredictable.